Silicon Design Engineer 2

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

<span style="font-family:"Arial",sans-serif">RESPONSIBILITIES:

  • <span style="font-family:"Arial",sans-serif">Work with global SOC design team for large scale ASIC chip verification and emulation implementation.
  • <span style="font-family:"Arial",sans-serif">Focus on SOC feature verification, emulation model development, FW/SW verification, performance and power analysis etc.
  • <span style="font-family:"Arial",sans-serif">Responsible for multiple aspects in verification areas and provide technically leadership to the engineering team.
  • <span style="font-family:"Arial",sans-serif">Accountable for project delivery.

<span style="font-family:"Arial",sans-serif">REQUIREMENTS:

  • <span style="font-family:"Arial",sans-serif">Familiar with Unix/Linux environment and good at scripts
  • <span style="font-family:"Arial",sans-serif">Understand the architecture of the chip and functional block being designed
  • <span style="font-family:"Arial",sans-serif">Build C/C++ model for simulation
  • <span style="font-family:"Arial",sans-serif">Build test bench and monitors for DUT using UVM, SV language
  • <span style="font-family:"Arial",sans-serif">Compose test plan and validation vectors to ensure functional completeness
  • <span style="font-family:"Arial",sans-serif">Debug function/performance bugs of graphics chips
  • <span style="font-family:"Arial",sans-serif">Preferred Experience:
  • <span style="font-family:"Arial",sans-serif">Familiar with emulation Environment (including Zebu and Veloce platform and tools)
  • <span style="font-family:"Arial",sans-serif">Experience with design for verification (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)
  • <span style="font-family:"Arial",sans-serif">Should be versatile in any one of the high level verification flow such as SV,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verification
  • <span style="font-family:"Arial",sans-serif">Should have excellent communication skills (both written and oral)
  • <span style="font-family:"Arial",sans-serif">Strong problem solving skills

<span style="font-family:"Arial",sans-serif">EDUCATION:

  • <span style="font-family:"Arial",sans-serif">Major in EE, CS or related, Master Degree or Bachelor with 2+ years working experiences



Requisition Number: 80373 
Country: China State: Shanghai City: Shanghai 
Job Function: 
Design  

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