Sr. DFT Engineer

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

 

 

What you do at AMD changes everything

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, Immersive platforms, and the data center.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
 

JOB TITLE: Sr. Silicon Design Engineer - DFT

 

Job Summary:

      You are responsible to RTG SOC DFT scan domain related work, tile/top level scan insertion/ATPG/Pattern generation/simulation/coverage analyze and ATE test support. You are also responsible to co-work with other teams to make sure our scan quality and improve our coverage. You should contribute to the development of automation environment to improve work efficiency.

 

KEY RESPONSIBILITIES:

In this role, the candidate will be responsible for

  1. Work with cross team to finish tile scan insertion and ATPG in each milestone;
  2. Complete tile level pattern generation and simulation/debug
  3. Complete tile level coverage analysis and improve the test coverage
  4. Setup chip level ATPG environment and finish chip level DRC and simulation
  5. Generate production scan pattern and guarantee the pattern quality
  6. Take part in DFD(design for debug) related work and do support for function team
  7. Develop automation script to improve the work efficiency.

 

Job Requirements:

Education& Qualifications:

  1. Bachelor or MS or PHD in Electrical Engineering, Computer Engineering or Computer Science;
  2. BS 6+ years or MS 3+ years or PhD 1+ years’ experience in DFT;
  3. Strong knowledge of DFT domain;
  4. Solid experience with DFT scan insertion and ATPG;
  5. Familiar with ASIC/DFT regular tools, DC tool/Tessent tool/VCS tool;
  6. Fully experience with ATE Bring up

 

Soft Skill:

  1. Highly motivated, innovative individual, good ownership and leadership;
  2. Excellent execution ability and good sense of responsibility;
  3. Must have good communication & Analytical thinking skills;
  4. Excellent written and verbal communication skills in both Chinese and English;

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. EOE/MFDV



Requisition Number: 76144 
Country: China State: Shanghai City: Shanghai 
Job Function: Design

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