Silicon Design Engineer 2

Location: Shanghai, Shanghai, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

JOB TITLE HERE

 

THE ROLE:

DXIO (Distributed CrossBar IO) team delivers industry leading high-performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles. DXIO supports multi-protocol high speed IO (PCIe/SATA/Ethernet). You'll be working with the global team Architects/Designers/DV on DXIO IP and subsystem Verification.

 

THE PERSON:

People who have the passion to work on leading edge technology, who have good communication skills will be definitely successful in this role.

 

KEY RESPONSIBILITIES:

  • Develop and update infrastructure and environment for IP level design verification.
  • Closely working with Design and Architecture team to develop new verification component
  • Responsible for DXIO IP new features verification plan and verification closure

 

PREFERRED EXPERIENCE:

  • Solid background with ASIC design verification flow and multiple ASIC tape out experience
  • Solid knowledge on UVM, SystemVerilog , Verilog
  • Fluent vocal English for technical discussion among global team
  • Knowledge on High speed IO/PCIE is a big plus
  • Knowledge on script language like perl, python, ruby is a plus

 

ACADEMIC CREDENTIALS:

  • Candidate is preferred to be MSEE with 3~7 years, or BSEE with minimum of 4-years’ experience in digital ASIC/SOC design verification.

 

LOCATION:

Shanghai



Requisition Number: 117042 
Country/Region/Location: China State/Province: Shanghai City: Shanghai 
Job Function: 
Design  

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