IP Architect

Location: Taipei, CN

Company: Advanced Micro Devices

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What you do at AMD changes everything 


At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 


Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

 

Key Responsibilities:

 

  • Be part of AMD IO IP team, joining IP architecture work to define host controller IP structure for next generation of leading-edge super high speed IO, up to 40 Gb/s. Establishes and maintains AMD high speed IO technological leadership position.
  • Defines and develops micro-architecture for host controller design, based on architectural requirement for next generation IO. Leads RTL code development for IP blocks in Verilog HDL and make sure functional correct and reusable for different product lines.
  • Is responsible for projects or processes of significant strategic or commercial importance and for project/program results
  • Deals with problems requiring cutting edge approaches and champions innovation across the organization
  • Provides consultative direction with senior management
  • Makes technical decisions that have a significant impact on product families, go to market strategies and customer satisfaction
  • Coaches and mentors experienced staff
  • Represents AMD IO team to the outside technical community, partners and vendors

 

 

Skills and Experiences:

 

  • MS degree of EE or CS, with minimum 10 years’ experience
  • Specialized knowledge of USB 3.1/3.2 or Thunderbolt in protocol and link layers is preferred. Specialized knowledge of PCIE or AMBA is a plus. 
  • Expert of IP micro-architecture and Verilog RTL design on large size digital IP.
  • Considered technical leader across project and departmental boundaries and has a proven track record for sustained innovation
  • Fluent English on talking, presentation and writing documents.
  • Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.
  • Can solve complex, novel and non-recurring problems; initiates significant changes to existing processes/methods and leads development and implementation.

 

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Requisition Number: 73320 
Country: Taiwan, China​​​​​​​
Job Function: Design 

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